Types of RESET
The PIC 18F452 differentiates between various types of RESETs.
1. Power on Resets ( POR )
2. MCLR reset during normal operation
3. MCLR reset during Sleep
4. WDT ( Watch Dog Timer) reset during normal operation
5. Programmable Brown out Reset ( BOR)
6. RESET instruction
7. Stack Full Reset
8. Stack Underflow Reset
Most registers are unaffected by a RESET. Their status is unknown by POR and unchanged by all other RESETs. The WDT dose not change any registers. The MCLR pin not driven low by any internal RESETs including WDTs.
Power –On Reset ( POR)
The power –On Reset pulse is generated on chip when VDD rise is detected. If the microcontroller supports POR, the no external RC circuitry should be connected to MCLR pin. The internal POR circuitry will take care of the opeation. In this case MCLR can be tied directly to VDD. External Power on Reset is only needed when the VDD power up slope is very slow. The diode D1 helps discharge the capacitior C1 quickly when the VDD power downs.The value of R2 should not does not exceed 40 Kohms so that voltage drop across R2 does not violate electrical specifications. The value of R1 should be between 100 Ohms and 1 Kohms to limit the current flow through MCLR pins.
Power – Up Timer (PWRT)
The Power – Up Timer provides a fixed nominal time out only on power up from POR. The PWRT operates on an internal RC oscillator. The chip is kept in RESET as long as PWRT is active. The PWRT time delay allows VDD to rise to an acceptable level. A configuration bit is provided to enable/disable PWRT. The value of the PWRT delay varies from chip to chip and depends upoon and number of factors.
Oscillator Start Up Timer ( OST)
The Oscillator Start – Up Timer provides a 1024 oscillator cycle delay after PWRT. This ensures that the crystal oscillator or resonator has started stabilized.
Brown –Out Reset ( BOR )
The Brown-Out Reset can be enabled or disabled by the configuration bit BOREN. Setting this bit will enables BOR. If VDD falls below the acceptable level mentioned in the datasheet, then BOR will reset the chip, if enabled. The chip will remain in brown out until the VDD rises above BVDD. If the Power Up Timer is enabled, then it will be invoked after VDD rises about BVDD.
