Sunday, April 12, 2009

Interrupts in PIC

Interrupts in PIC microcontroller

Interrupts are used to interrupt the flow of the processor and make it to branch to another memory location in the program memory. Once the interrupt occur, the PC changes to the vectored location of the interrupt, where instructions are written to do a certain task. These tasks are called Interrupt Service Routine ( ISR ). If suppose, the processor needs attention to some special external or internal events, the we need to associate it with interrupts. Once that external or internal interrupt occurs, the program branches to ISR. It will execute the ISR and returns back to the PC location , where it branched. As I had told you, the sources of interrupts will be internal or external. A switch bounce is an external interrupt. Once the switch bounce is occured in the interrupt pin, the PC counter is branched to that corresponding ISR. Likewise, interrupts can be internal also, once the timer/counter got expired, an internal interrupt can be triggered which will branch the PC to any ISR.
If the interrupt mechanism is not enabled, then we have to go for polling methold. In polling methold, the processor waste time, polling for the event to occur.
Unlike other PIC microcontrollers or other microcontrollers, the PIC18F series microcontrollers has got two interrupt vectors. One is having high priority and other having low priority vectored to location 0x0008 h and 00x18 h respectively. But in PIC16 F series of microcontroller, there is only one interrupt vector at location, 0x0004 h.
When the interrupt occurs, the return address ( the address of the next PC location ) is stored on the return address stack. The last instruction in the interrupt service routine is an RETFIE assembly language instruction, which is a return from interrupt instruction. The RETFIE instruction causes the return address to be popped off the stack and program execution to continue from the point at which it was interrupted.
The main interrupt control registers are INTCON, INTCON2, INTCON3, PIR1, PIR2, PIE1, and PIE2.
Two important bits in INTCON are GIE ( Global Interupt Enable) and PEIE( Peripheral Interrupt Enable). When GIE is made 1, all the unmasked interrupts are enabled.For enabling other peripheral interrupts like, SPI, I2C etc.. make PEIE as 1. In the PIR registers, the interrupt enable bit of the corresponding peripherals should be enabled. Otherwise interrupts will not enabled. For monitoring, when the interrupt occures, the developer has to monitor the correspoding bits in PIR resgiters.
So for enabling an interrupt, the task is like this.
1. Make GIE ( Global Interrupt Enable) and PEIE as 1
2. Enable corresponding bits in PIE resgiters.
3. Monitor corresponding flag bits in PIR registers.
We should write ISR at 0x0008 H for high priority interrupt
Org 0x0008 H ; Goes to this location on a high priority interrupt
; Type your ISR here
RETFIE
We should write ISR at 0x0018 H for low priority
Org 0x0018 H ; Goes to this location on low priority interrupt
; Type your ISR here
RETFIE
Once the RETFIE instruction is enountered, the control will goes back to your program from ISR.

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